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// Copyright (c) 2006-2008 The Chromium Authors. All rights reserved. |
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// Use of this source code is governed by a BSD-style license that can be |
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// found in the LICENSE file. |
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|
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// For atomic operations on reference counts, see atomic_refcount.h. |
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// For atomic operations on sequence numbers, see atomic_sequence_num.h. |
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|
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// The routines exported by this module are subtle. If you use them, even if |
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// you get the code right, it will depend on careful reasoning about atomicity |
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// and memory ordering; it will be less readable, and harder to maintain. If |
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// you plan to use these routines, you should have a good reason, such as solid |
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// evidence that performance would otherwise suffer, or there being no |
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// alternative. You should assume only properties explicitly guaranteed by the |
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// specifications in this file. You are almost certainly _not_ writing code |
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// just for the x86; if you assume x86 semantics, x86 hardware bugs and |
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// implementations on other archtectures will cause your code to break. If you |
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// do not know what you are doing, avoid these routines, and use a Mutex. |
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// |
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// It is incorrect to make direct assignments to/from an atomic variable. |
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// You should use one of the Load or Store routines. The NoBarrier |
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// versions are provided when no barriers are needed: |
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// NoBarrier_Store() |
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// NoBarrier_Load() |
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// Although there are currently no compiler enforcement, you are encouraged |
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// to use these. |
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// |
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|
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#ifndef BASE_ATOMICOPS_H_ |
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#define BASE_ATOMICOPS_H_ |
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|
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#include "base/basictypes.h" |
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#include "base/port.h" |
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|
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namespace base { |
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namespace subtle { |
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|
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// Bug 1308991. We need this for /Wp64, to mark it safe for AtomicWord casting. |
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#ifndef OS_WIN |
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#define __w64 |
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#endif |
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typedef __w64 int32 Atomic32; |
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#ifdef ARCH_CPU_64_BITS |
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// We need to be able to go between Atomic64 and AtomicWord implicitly. This |
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// means Atomic64 and AtomicWord should be the same type on 64-bit. |
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typedef intptr_t Atomic64; |
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#endif |
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|
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// Use AtomicWord for a machine-sized pointer. It will use the Atomic32 or |
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// Atomic64 routines below, depending on your architecture. |
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typedef intptr_t AtomicWord; |
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|
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// Atomically execute: |
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// result = *ptr; |
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// if (*ptr == old_value) |
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// *ptr = new_value; |
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// return result; |
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// |
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// I.e., replace "*ptr" with "new_value" if "*ptr" used to be "old_value". |
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// Always return the old value of "*ptr" |
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// |
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// This routine implies no memory barriers. |
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Atomic32 NoBarrier_CompareAndSwap(volatile Atomic32* ptr, |
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Atomic32 old_value, |
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Atomic32 new_value); |
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|
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// Atomically store new_value into *ptr, returning the previous value held in |
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// *ptr. This routine implies no memory barriers. |
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Atomic32 NoBarrier_AtomicExchange(volatile Atomic32* ptr, Atomic32 new_value); |
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|
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// Atomically increment *ptr by "increment". Returns the new value of |
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// *ptr with the increment applied. This routine implies no memory barriers. |
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Atomic32 NoBarrier_AtomicIncrement(volatile Atomic32* ptr, Atomic32 increment); |
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|
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Atomic32 Barrier_AtomicIncrement(volatile Atomic32* ptr, |
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Atomic32 increment); |
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|
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// These following lower-level operations are typically useful only to people |
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// implementing higher-level synchronization operations like spinlocks, |
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// mutexes, and condition-variables. They combine CompareAndSwap(), a load, or |
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// a store with appropriate memory-ordering instructions. "Acquire" operations |
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// ensure that no later memory access can be reordered ahead of the operation. |
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// "Release" operations ensure that no previous memory access can be reordered |
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// after the operation. "Barrier" operations have both "Acquire" and "Release" |
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// semantics. A MemoryBarrier() has "Barrier" semantics, but does no memory |
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// access. |
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Atomic32 Acquire_CompareAndSwap(volatile Atomic32* ptr, |
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Atomic32 old_value, |
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Atomic32 new_value); |
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Atomic32 Release_CompareAndSwap(volatile Atomic32* ptr, |
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Atomic32 old_value, |
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Atomic32 new_value); |
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|
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void MemoryBarrier(); |
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void NoBarrier_Store(volatile Atomic32* ptr, Atomic32 value); |
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void Acquire_Store(volatile Atomic32* ptr, Atomic32 value); |
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void Release_Store(volatile Atomic32* ptr, Atomic32 value); |
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|
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Atomic32 NoBarrier_Load(volatile const Atomic32* ptr); |
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Atomic32 Acquire_Load(volatile const Atomic32* ptr); |
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Atomic32 Release_Load(volatile const Atomic32* ptr); |
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|
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// 64-bit atomic operations (only available on 64-bit processors). |
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#ifdef ARCH_CPU_64_BITS |
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Atomic64 NoBarrier_CompareAndSwap(volatile Atomic64* ptr, |
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Atomic64 old_value, |
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Atomic64 new_value); |
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Atomic64 NoBarrier_AtomicExchange(volatile Atomic64* ptr, Atomic64 new_value); |
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Atomic64 NoBarrier_AtomicIncrement(volatile Atomic64* ptr, Atomic64 increment); |
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Atomic64 Barrier_AtomicIncrement(volatile Atomic64* ptr, Atomic64 increment); |
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|
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Atomic64 Acquire_CompareAndSwap(volatile Atomic64* ptr, |
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Atomic64 old_value, |
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Atomic64 new_value); |
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Atomic64 Release_CompareAndSwap(volatile Atomic64* ptr, |
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Atomic64 old_value, |
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Atomic64 new_value); |
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void NoBarrier_Store(volatile Atomic64* ptr, Atomic64 value); |
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void Acquire_Store(volatile Atomic64* ptr, Atomic64 value); |
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void Release_Store(volatile Atomic64* ptr, Atomic64 value); |
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Atomic64 NoBarrier_Load(volatile const Atomic64* ptr); |
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Atomic64 Acquire_Load(volatile const Atomic64* ptr); |
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Atomic64 Release_Load(volatile const Atomic64* ptr); |
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#endif // ARCH_CPU_64_BITS |
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|
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} // namespace base::subtle |
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} // namespace base |
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|
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// Include our platform specific implementation. |
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#if defined(OS_WIN) && defined(COMPILER_MSVC) && defined(ARCH_CPU_X86_FAMILY) |
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#include "base/atomicops_internals_x86_msvc.h" |
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#elif defined(OS_MACOSX) && defined(ARCH_CPU_X86_FAMILY) |
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#include "base/atomicops_internals_x86_macosx.h" |
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#elif defined(COMPILER_GCC) && defined(ARCH_CPU_X86_FAMILY) |
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#include "base/atomicops_internals_x86_gcc.h" |
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#elif defined(COMPILER_GCC) && defined(ARCH_CPU_ARM_FAMILY) |
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#include "base/atomicops_internals_arm_gcc.h" |
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#else |
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#error "Atomic operations are not supported on your platform" |
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#endif |
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|
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#endif // BASE_ATOMICOPS_H_ |